A switching network is composed of ports with pins, conductors and switches. The ports and pins are external constructs of the switching network where each port contains a plurality of pins to interface or connect to other switching networks or circuits. The conductors and switches are internal constructs of the switching network configured to transfer data or signals from pins of a first plurality of ports to pins of a second plurality of ports of the switching network; the conductors connecting to a port can be grouped as a buss. The pins of the first plurality of ports receive data or signals and transmit those data or signals through the conductors and the switches of the switching network to the pins of the second plurality of ports. The switching network can be either bi-directional where the pins of the first plurality of ports and the second plurality of ports can both receive and transmit data or signals through the conductors and switches of the switching network. The pins of the ports of the switching network are physically connected to respective conductors of the switching network. The switches of the switching network can be programmed, either one time or repeatedly, to enable connection paths among the pins of the first plurality of ports to the pins of the second plurality of ports. The connection paths connecting pins inside the switching network can sometimes involve one or more intermediate conductors coupled through switches of the switching network.
Generally, the transmission of data or signals from the first plurality of ports to the second plurality of ports through the switching network can either be single-casting, where a pin of the first plurality of ports connects to a pin of the second plurality of ports, or can be multi-casting where data or signals of a pin of the first plurality of ports are transmitted to multiple pins of respective multiple ports of the second plurality of ports. The switching network can be used in a routing fabric for systems, networks, and routers, etc. The switching network can also be used as programmable interconnect circuitry for programmable logic circuits. In the case of programmable logic circuits, the multicasting corresponds to a source (output) connecting to multiple sinks (inputs) which is generally expressed as the fan-out of an output or fan-in of the inputs. The convention stated thus far does not preclude nor restrict the switching network to be unidirectional where a signal flows only from a pin of the first plurality of ports to a pin of the second plurality of ports. Depending on actual circuit implementation, it is possible to allow a signal flowing from a pin of the second plurality of ports to a pin of the first plurality of ports of the switching network.
Interconnection or routing fabric using switching networks in hierarchy is described in U.S. Pat. Nos. 7,368,943 and 7,460,529. FIG. 1 illustrates a conventional switching system using three levels of switching networks connecting to functional blocks: four 11's: 11-1, 11-2, 11-3, 11-4 (LO's), two 12's: 12-1, 12-2 (L1's) and one 13 (L2) in hierarchy connecting to sixteen 10's: four 10-1, four 10-2, four 10-3, and four 10-4 functional blocks (FBs), where each FB in each 10-i can either be a switching network coupling logical circuits or logical circuits for i=[1:4]. When each FB is a switching network coupling to logic circuits, the switching system depicted in the embodiment of FIG. 1 can be treated as having four levels of switching networks in hierarchy. Switching network 13 is the root or ancestry network of the switching system illustrated in the respective embodiments of FIG. 1 and FIG. 2 with the 10-is or the FBs as the leaf cells. The interconnections in 140, 150 and 160 of FIG. 1 and FIG. 2 are respectively described as the sibling connections or couplings, the cousin connections or couplings and the tribal connections or couplings in U.S. Pat. No. 7,368,943. The difference between the embodiments of FIG. 1 and FIG. 2 are the Megacell FB 11-4 of FIG. 2 replacing 11-4, 11-3 and 10-4s of FIG. 1. Each of the switching networks can be a full matrix crossbar switch, a Clos network or any of the switching networks as described in U.S. Pat. Nos. 6,975,139, 7,256,614, 7,417,457, 7,557,613, U.S. patent application Ser. Nos. 12/327,702, 12/327,704 or 12/491,089, or any other switching networks; except for the case of the full matrix crossbar switch, the other types of switching networks has at least one level of intermediate conductors coupling through switches to the pins of the input ports and output ports of the respective switching networks.
It is readily determined that the interconnection or routing path (or alternatively circuit timing delay) of any part of the switching network hierarchy for adjacent siblings, cousins or tribes are shorter (thus faster) than those non-adjacent ones in the conventional designs illustrated in FIG. 1 and FIG. 2. For example, any of the FB of 10-1 of FIG. 1 and FIG. 2 connecting to non-adjacent FB of 10-3 need to use the path: (Buss 101-1→Network 13→Buss 110-2→Network 12-2→Buss 120-3→Network 11-3→FB of 10-3) or alternatively, another path: (Buss 101-1→Network 11-1→Buss 140→Network 11-2→Buss 150→Network 11-3→FB of 10-3); while for the two adjacent FBs of 10-2 and 10-3, the connection path is simply through one of the buss of 160. Similarly, in the case of adjacent cousins, 11-2 can connect to 11-3 directly using the Buss of 150 while for non-adjacent cousins such as 11-1 and 11-4, the connection path is much longer than those of adjacent cousins for the examples illustrated in FIG. 1 and FIG. 2. The network connection path for non-adjacent tribal connections is of longer path than that for adjacent tribes. Thus there is non-uniformity in routing paths with the shorter ones biased toward adjacency cases.